Tessent TestKompress
Tessent® TestKompress® delivers the highest quality deterministic scan test with the lowest manufacturing test cost. The solution uses a patented on-chip compression technique to create scan pattern sets that have dramatically less test data volume and reduced test time on the automatic test equipment.
Highlights
- Thorough testing of digital logic with scan-based patterns.
- Fast pattern generation through high-performance ATPG algorithms and distributed processing.
- A wide variety of fault models, including stuck-at, transition, path delay, multiple-detect, and more provide a thorough test program applicable to smaller geometry technologies.
- Supports low pin count test strategies (as few as one scan channel).
- Failure files can be analyzed with Tessent Diagnosis and Tessent YieldInsight.
Related Products
Tessent SoCScan
Tessent TestKompress can be used with Tessent SoCScan to take advantage of the Mentor Graphics automated hierarchical test integration and test generation flow. Tessent SoCScan makes use of shared isolation and capture-by-domain technologies to deliver independent core-level ATPG and chip-level pattern reuse. Tessent SoCScan
Tessent IJTAG
Tessent ® IJTAG provides automation to support the emerging IEEE P1687 (IJTAG) standard for plug-and-play IP integration. Tessent TestKompress can make use of IJTAG to efficiently describe the tasks, which setup the design for subsequent tests, as well as tasks, which need to be run after completion of the test execution. Tessent IJTAG
Tessent LBIST
Tessent TestKompress can be used as a stand-alone test strategy or in conjunction with Tessent LBIST. The combination of the two solutions enables application of any combination of pseudorandom, deterministic, or compressed deterministic patterns. This provides the maximum flexibility for achieving the most effective test time versus quality optimization. Tessent LogicBIST
Datasheets
Resources
Tessent Training
We have training courses available for Tessent products in our training centers around the world, online, or at your site.
Contact Mentor Graphics
- Tessent TestKompress Info Request or call toll free: 1-800-547-3000
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Tessent TestKompress with Cell-Aware Testing
Mentor Graphics
"Cell-aware" automatic test pattern generation is being used to find the defects that occur within cells. Tessent TestKompress automates the analysis of cell libraries with a tool called CellModelGen and a language for creating user-defined fault models. This cell-aware methodology uses the physical characterization of cells to generate test patterns deterministically for potential defect locations. Learn more
2006 – Tessent TestKompress - Donald O. Pederson Award – IEEE