Automated Test Creation for Mixed Signal IP using IJTAG
Mentor Test Announcements at 2013 ITC
Steve Pateras talks to EDA Café about what's new and hot in test from Mentor.
Improve Logic Test with a Hybrid ATPG/BIST Solution
Two test strategies are used to test virtually all IC logic—automatic test pattern generation (ATPG) with test pattern compression, and logic built-in self-test (BIST). For many years, there was a...
Tessent Product Suite Overview
Built on the foundation of the best-in-class test tools for each test discipline, Tessent® brings these solutions together in a powerful test platform that ensures total chip coverage.