Beginning at 20nm, the challenges of lithographic imaging require the use of double patterning. Does this mean designers will have to do twice as much work? What about those pesky cycle design rule errors? How will we be able to keep it all straight? And just what are EDA vendors and foundries doing to make the designer's life bearable?
The best place to get some straight answers is from someone who has already done it successfully. Come to this "talk show" format session to hear experts describe their multi-patterning trials and tribulations, and zero in on the critical factors that determine a successful outcome.
- Moderator: Ed Sperling, Editor-In-Chief, System Level Design
- Michael White, Director of Product Marketing Calibre PV, Mentor GraphicsRob Aiken, R&D Fellow, ARM
- Jean-Pierre Geronimi, Special Project Director in Central CAD and Design Solutions, STMicroelectronics
- Kuang-Kuo Lin, Director, Foundry Design Enablement, Samsung
- Lars Liebmann, Distinguished Engineer, IBM
- Luigi Capodieci, Director DFM/CAD and R&D Fellow, GLOBALFOUNDRIES
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DAC, double patterning, Lithography, Multi-Patterning