I like martial arts films, from the old black and white movies dubbed in English or even subtitled, to the modern blockbusters with their almost endless array of special effects. I admit that I can’t really tell the different martial art styles apart, but frankly I don’t need to. Being able to distinguish styles wouldn’t add to my enjoyment of the films. What I do enjoy is watching a skilled expert (even minus the special effects) practice his art — it’s easy to appreciate the skills of a martial arts black belt master. I think the same can be said for engineering design – if you enjoy technology at all, it’s usually a treat to watch a well-versed engineer with basic communication skills (I know you’re smiling here) talk about systems engineering. As luck would have it, I’ve enjoyed two such opportunities in the last couple of weeks while teaching users about SystemVision and VHDL-AMS.
The more I work with the VHDL-AMS modeling language, the more I’m impressed with its capabilities. It truly is a multi-purpose modeling language well suited for describing complex mechatronic system behavior across a broad range of engineering disciplines and at multiple levels of functional abstraction. One of my responsibilities on the SystemVision team is teaching an occasional user training course. Training class instruction gets me out of my office for a few days and gives me a valuable opportunity to visit face-to-face with users to learn about what they do, and hopefully help them understand how using VHDL-AMS and SystemVision can help them improve their system designs.
When I teach a modeling or simulation training course, I am usually the sole instructor. But during the most recent two classes during the two weeks I mentioned above, an engineer from the SystemVision group tagged along to help out. I taught our standard SystemVision and VHDL-AMS courses while he added some great technical content with demonstrations tailored to the user’s applications. Gave students the chance to see practical applications for the things they were learning. My co-instructor is a long-time simulation model developer with more than 2 decades of experience, and he’s been using the VHDL-AMS language pretty much since it became a standard. Along with being a skilled modeler, he has a truly impressive collection of models and system examples covering a broad range of applications. In fact, his fingerprints are on many of the models now available in the SystemVision VHDL-AMS model library.
The majority of students in our two training classes work mostly in board level design and use at least one flavor of SPICE to simulate their designs. But when it comes to testing their board in the end system, often their only option is to build a prototype; their understanding and experience with modeling and simulation typically stop at board level. Many students were pleasantly surprised when my co-instructor turned on his laptop and started talking about modeling and simulation beyond the printed circuit board. He regularly puts both the SystemVision environment and the VHDL-AMS modeling language through their paces, much to the delight of users and fellow workers alike. By the end of both training classes, the students were noticeably impressed with the potential of both the language and the simulator – the benefits of watching a true master at work.
But it doesn’t take a black belt in VHDL-AMS to use the language and reap its benefits in system design. Armed with a basic understanding of the language, users can do some pretty impressive things with VHDL-AMS. An understanding of design technology mixed with a basic foundation in VHDL-AMS can go a long way in systems modeling. If you’re at all interested in modeling and simulation beyond SPICE, and you really should be if your board level design is part of a larger system, you owe it to yourself to investigate the capabilities of the VHDL-AMS modeling language and give it a try. No black belt required.
If you need a simulator that supports VHDL-AMS, you can download a demonstration version of SystemVision here.