I could quickly answer the question posed in this post’s title with four words: Analog and Mixed-Signal. But as with most concepts worth understanding, especially in the engineering world, you need to dig a little deeper to understand some of the finer details, and maybe the larger significance. First, a quick history lesson.
IEEE Standard 1076 defined a standard language for logic modeling, which later became known as VHDL. VHDL is now one of the power-house languages used in digital modeling, particularly in the IC design market. But as designs become more complex, design teams need to model and analyze larger portions of their entire system – systems which, with increasing frequency, contain mutliple mechatronic components. But VHDL isn’t quite right for modeling anything beyond tracing ‘1’s and ‘0’s through a system (I know, it’s a broad simplification, but bare with me…I’m simply trying to draw a comparison). The IEEE saw the advantages of extending VHDL beyond its logic modeling roots, so a working group investigated the possibility of adding mixed-signal and mixed-technology extensions. The end result is IEEE Standard 1076.1 – more commonly known as VHDL-AMS. But what does IEEE Standard 1076.1 really add to the definition of IEEE Standard 1076? There are, of course, a bunch of details, but I want to highlight three additions that make VHDL-AMS a great choice for mechatronic system modeling.
First, VHDL-AMS added “terminals” or analog ports. A terminal supports continuous dependent and independent variables in a simulation, and allows the model’s analog terminals to connect to other analog terminals of the same “nature”. What is a nature you ask? Keep reading.
Because VHDL-AMS is a mixed-technology language, natures were added as a way to assign a terminal to a particular technology. VHDL-AMS supports several pre-defined natures including electrical, magnetic, translational, rotational, and fluidic. When a terminal is assigned a nature, the simulation results are plotted in units native to the technology.
Finally, “quantities” were added as a way to define the functional relationship between terminals. For terminals, there are two types of quantities: through and across. An across quantity defines a terminal’s forcing function. A through quantity defines its forced function. Voltage and current are examples of a forcing and a forced function, respectively, for electrical systems. Every mechatronic system design technology has corresponding forcing and forced function definitions.
While there are other features that distinguish VHDL-AMS from VHDL, the terminal, nature, and quantity are among the most important. Without these three language elements, VHDL-AMS would be ill-suited for modeling mechatronic systems.