VHDL-AMS (IEEE Standard 1076.1) provides hardware modeling capabilities that are well suited for CAN signal integrity analysis. This includes modeling the analog, digital and mixed-signal aspects of the transceivers, as well as the behavior of twisted-pair transmission lines, connectors and other components of the CAN Physical Layer. SystemVision supports both VHDL-AMS as well as traditional Spice modeling methods. This paper presents various modeling approaches applicable to the key hardware components of a CAN bus. It also provides examples of simulation-based techniques for CAN signal integrity design.