Create mixed process systems-on-chip with higher density, lower power, and greater bandwidth—all without disrupting your existing design flows. Mentor tools provide full support for 2.5D (silicon interposer) and 3D (stacked die with TSVs) physical verification, extraction, simulation and testing.
Calibre—the leading platform for IC physical verification, extraction, LVS and DFM—meets the needs of designers building 3D-IC products today, whether they are based on SiP, silicon interposers or stacked die with TSVs. Learn more
3D-IC Design and Test Resources
Technology Overview: 3D-IC technology has been getting a lot of attention in the press and at technical conferences. Whether the 3D-IC is built on Silicon Interposers or stacked die with Through Silicon Vias, Mentor Graphics... View Technology Overview
White Paper: Presents a verification methodology for 3D-ICs, including connectivity checking and parasitic extraction. Discusses new challenges and EDA tools to responds to those challenges. An example illustrates... View White Paper