|Design for Low Power with Nucleus RTOS||Technology Overview||Embedded Software|
|Questa Platform Datasheet||Datasheet||Functional Verification|
|How do we get 'Intelligence' into the Business of Electronics Manufacturing?||White Paper||Valor MSS PCB Manufacturing Systems Solutions|
|Low Power Test||White Paper||Silicon Test and Yield Analysis|
|ModelSim Simulation of Waveforms and Debug Demo for Beginners||Product Demo||Functional Verification|
|Re-defining Verification Performance||Technology Overview||Functional Verification|
|Effective SoC Verification: The Hardware and Software Challenge||Technology Overview||Functional Verification|
|Advanced Technology for Advanced Verification,Advanced Technology for Block Level||Technology Overview||Functional Verification|
|Nucleus Power Management Demystified: Concepts||Technology Overview||Embedded Software|
Low Power Solutions
A new generation of tools from Mentor has recently debuted that delivers modeling fidelity and simulation performance at the early design exploration stage.
Mentor’s power aware simulation gives designers the ability to functionally verify their power management techniques at the RTL, reducing costs significantly both in terms of effort and time.
Mentor’s place and route solution, Olympus-SoC is UPF-compliant and handles a variety of low power design styles during placement, routing, and optimization.
Low Power Resources
On-demand Web Seminar: During this technical session we will look at common issues created by demands placed on the power distribution in today’s PCB designs. It will discuss techniques for delivering adequate voltage and... View On-demand Web Seminar
On-demand Web Seminar: Our discussion will focus on how to handle power intent within a Place and Route environment whilst meeting all design constraints, modes and corners for best QoR. View On-demand Web Seminar
- Mentor Graphics Announces the First IP to System, UPF-based Low-power Verification Solution
- Mentor Graphics Questa Functional Verification Platform Selected by Cypress Semiconductor
- Mentor Graphics Provides Comprehensive Low Power Solution in TSMC Reference Flow 10.0
- Mentor Graphics Launches Precise-IP Vendor-independent IP Platform for FPGA Design
- Mentor Graphics Catapult C Synthesis Selected by Fujitsu Microelectronics Solutions Limited for Design and Consulting Services