News and Articles

News and Press

• Mentor Graphics Announces that ON Semiconductor Completed Multiple Successful Tapeouts Using Pyxis Custom RouterNov 8, 2012
• Samsung and Mentor Graphics Expand Calibre Signoff and Foundry Mask Processing Solution for 20nmJun 6, 2012
• Hitachi Employs Mentor Graphics Olympus-SoC Place and Route Platform for Critical ASIC DesignsJun 5, 2012
• TowerJazz Finds a Unique Solution for Advanced ESD and Power Domain Checking in Calibre PERCMay 22, 2012
• SMIC Employs Mentor Graphics Calibre PERC for Reliability Verification of Multi-Power Domain SoCs May 22, 2012
• GLOBALFOUNDRIES Improves IC Reliability with Customized Circuit Checks Using Mentor Graphics Calibre PERC May 22, 2012
• Mentor Embedded Continues to Simplify Linux and Open Source Development with Support of the Yocto ProjectMar 27, 2012
• Calibre Flow Developed with Mentor Graphics Consulting Boosts GLOBALFOUNDRIES Silicon YieldMar 8, 2012
• Mentor Graphics Announces PADS Release Targeting   Design-for-Manufacturing (DFM) Analysis, High-Speed and Interactive RoutingMar 6, 2012
• Samsung DFM Ready for 20 nm Based on Mentor Graphics Calibre PlatformMar 1, 2012
• IEEE Board of Directors Elevates Janusz Rajski to the Grade of IEEE FellowDec 16, 2011
• Mentor Graphics and JEOL to Develop Advanced IC Mask Writing SolutionsNov 23, 2011
• Mentor Graphics Announces Completion of 20 nm Test Chip Tapeout with STMicroelectronics Using Olympus-SoC Place and Route SystemNov 4, 2011
• Mentor Graphics and TSMC Address Advanced Node Fill Requirements Using Calibre SmartFill Sep 14, 2011
• Mentor Graphics Vista ESL Platform Takes Center Stage in Mentor’s ESL Strategy with Expanded FunctionalitySep 7, 2011
• Mentor Graphics Signs AMDL as New Distributor in IndiaSep 7, 2011
• Mentor Graphics and GLOBALFOUNDRIES Improve Yield Analysis with Combination of Tessent and Calibre CapabilitiesAug 29, 2011
• GLOBALFOUNDRIES and Mentor Graphics Extend Collaboration to Third Generation of DFMAug 26, 2011
• Mentor Graphics Tessent YieldInsight Demonstrates Faster IC Failure and Yield Analysis at FujitsuMar 18, 2011
• Mentor Graphics Introduces Calibre RealTime for Instant Signoff Verification of Custom IC Designs Mar 10, 2011
• MediaTek Adopts Mentor Graphics Calibre PERC as its ESD and Circuit Reliability Verification SolutionFeb 11, 2011
• VIA Technologies Adopts Mentor Graphics Calibre PERC for Critical ESD CheckingFeb 7, 2011
• Mentor Graphics Calibre PERC Programmable Electrical Rule Checker Improves Fujitsu Chip ReliabilityJan 25, 2011
• STARC Advances Test of Low Power ICs Using Mentor Graphics Tessent TestKompressJan 24, 2011
• Mentor Graphics Completes Test Chip with IC Implementation Flow for Common Platform 32/28nm TechnologyJan 17, 2011
• NVIDIA uses Mentor’s Olympus-SoC Place and Route System for Leading-Edge Graphics ProcessorsOct 15, 2010
• Mentor Graphics Design-to-Silicon Solutions Used in Successful Development of TSMC 28nm Product Qualification Vehicle Test ChipAug 9, 2010
• Mentor Graphics Calibre Co-Development of TSMC’s iLVS Simplifies Modeling of Advanced Devices for Physical VerificationMay 27, 2010
• SMIC Bases DFM Sign-off Strategy on Mentor Graphics Calibre PlatformMar 30, 2010
• Freescale Semiconductor Collaborates with Mentor Graphics on Tessent Silicon Test, Yield Analysis, Calibre Physical Verification and DFM Jan 11, 2010
• Mentor Graphics Outlines Strategy to Unify Silicon Test and Yield Analysis Nov 2, 2009
• New Mentor Graphics Tessent YieldInsight Product Improves IC Yield through Statistical Analysis of Test Failure Data Nov 2, 2009
• Mentor Graphics Delivers Must-have Reference for the Open Verification Methodology (OVM)Oct 28, 2009
• Trident Microsystems Adopts Mentor Graphics Veloce Hardware Emulator to Accelerate Time-To-Market for their Next Generation Digital TV SoCsOct 26, 2009
• TSMC Selects Calibre Physical Verification Platform for Integrated Sign-off Flow Oct 22, 2009
• GLOBALFOUNDRIES Selects Mentor Graphics Calibre Platform for Computational Lithography and DFM EnablementOct 16, 2009
• Mentor Graphics Chairman and CEO to Present Keynote at the PLM Road Map 2009 ConferenceSep 17, 2009
• Mentor Graphics and Applied Materials Deploy OASIS.MASK Open Data Standard for Higher Efficiency Mask ManufacturingSep 14, 2009
• Mentor Graphics Acquires LogicVision; Unites BIST, ATPG and Test Pattern Compression Technologies Aug 18, 2009
• Mentor Graphics Announces Complete Design through Manufacturing Solution in TSMC Reference Flow 10.0Jul 23, 2009
• Mentor Releases New Calibre Versions Using Interoperable iDRC and iLVS Formats Introduced by TSMC Jul 23, 2009
• UMC Qualifies Comprehensive Mentor Graphics Silicon Test Suite for its 65nm and 40nm IC Reference FlowsJun 23, 2009
• Mentor Graphics Announces All-Calibre Physical Verification and DFM Flow for Advanced IC Designs at Fujitsu MicroelectronicsMay 26, 2009
• Mentor Graphics Appoints New Vice President of Human ResourcesMay 6, 2009
• Mentor Graphics TestKompress ATPG Software Wins Test & Measurement World’s Test of Time AwardApr 22, 2009
• Mentor Graphics Provides Complete 3D Variability Solution Addressing Density and Thickness ChallengesMar 17, 2009
• Cambridge Silicon Radio Limited Successfully Deploys Calibre DFM Solutions to Help Drive Rapid Process Migration Mar 3, 2009
• Mentor Graphics Olympus P&R and Calibre Verification Platforms Qualified for 32nm IC Designs at STMicroelectronicsMar 2, 2009
• Mentor Graphics’ Olympus-SoC Place-and-Route System Wins 2009 DesignVision AwardFeb 13, 2009
• Mentor Graphics DFT Tools Adopted by STMicroelectronics for Advanced IC Testing Solutions Jan 26, 2009
• Mentor Graphics and Freescale Expand Collaboration to Improve Manufacturing and Testing of Nanometer TechnologiesJan 26, 2009
• Mentor Graphics Olympus-SoC Place-and-Route System Qualifies for TSMC 40nm ProcessesDec 11, 2008
• NEC Electronics Selects Mentor Graphics Calibre nmLVS for Advanced Circuit Characterization at 40nm and BelowNov 13, 2008
• Mentor Graphics Olympus-SoC Place-and-Route System Slashes Design Closure Times with Industry’s First Parallel Timing Analysis and Optimization TechnologyOct 13, 2008
• TSMC Adopts Mentor Graphics Calibre Equation-Based DRC Feature for Advanced Physical VerificationOct 7, 2008
• IBM and Mentor Graphics to Develop 22nm Computational Lithography Solution for the Integrated Circuit Industry Sep 17, 2008
• Mentor Consulting Slashes Time-to-Mask at Dongbu HiTek with Optimized Calibre Flow Jul 22, 2008
• Mentor Graphics' Calibre nmOPC Product Wins SI Editors’ Choice Best Product AwardJul 9, 2008
• Mentor Graphics Provides Advanced Design For Manufacturing Capabilities in TSMC Reference Flow 9.0Jun 12, 2008
• Mentor Graphics Calibre nmOPC on Cell/B.E. Platform Qualified for Production at IBMFeb 26, 2008