MediaTek Adopts Mentor Graphics Calibre PERC as its ESD and Circuit Reliability Verification Solution
WILSONVILLE, Ore., February 11, 2010 - Mentor Graphics Corporation (NASDAQ: MENT) today announced that MediaTek, Inc., a leading fabless semiconductor company for wireless communications and digital multimedia solutions, has adopted the Calibre® PERC product as its solution for electrical rule checking (ERC) to help ensure comprehensive electrostatic discharge (ESD) protection and increase overall product reliability. The Calibre PERC solution increases the level of automation and accuracy of circuit verification, and reduces the number of false errors compared to MediaTek’s prior approach.
MediaTek is seeing significant benefits from Mentor’s advanced ERC technology and support. Because Calibre PERC is purpose-built for electrical rule checking, it handles MediaTek’s specific ERC challenges more comprehensively and accurately with less manual intervention. It also provides MediaTek with more data do diagnose the root cause of ESD failures and other reliability issues.
In addition to checking the existence and proper connectivity of ESD protection devices, MediaTek is also using the Calibre PERC product to measure and verify parasitic resistance between power clamping cells and power/ground bumps along potential ESD paths. They also use the tool to verify correct placement of on-chip ESD components within multiple voltage domains, and maximum geometrical distance between ESD diodes and receiver gate NMOS/PMOS devices.
“Calibre PERC continues to demonstrate its flexibility in delivering a range of circuit verification applications that customers have previously had to address with ‘one-off’ tools, scripts and other partial solutions,” said Joseph Sawicki, vice president and general manager of Mentor’s Design-to-Silicon division. “Calibre PERC provides a comprehensive, high capacity, production proven circuit reliability solution that is fully interoperable with the ubiquitous Calibre nm platform.”
About Calibre PERC
The Calibre PERC product addresses a range of applications including validating that a circuit has sufficient protection against electrostatic discharge (ESD) events, and helping designers identify inappropriate connections between multiple power supplies in mixed-signal ICs. It helps ensure the completeness of circuitry needed to protect a device against ESD and ensures a higher level of ESD design rule compliance because it goes beyond traditional layout geometry-based checking to enable verification of specific device and interconnect structures and electrical characteristics. For example, it can identify the omission of required ESD protection on a schematic or netlist. It can also be used to look for errant signal paths and other soft connection errors such as well connection errors, floating devices, nets, or pins, incorrect voltage supply connections, excessive series pass gates, problem level shifter designs, antenna checks, floating wells, minimum “hot” NWELL width, and many others.
About Mentor Graphics
Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues over the last 12 months of about $850 million. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.
(Mentor Graphics and Calibre are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owners.)
For more information, please contact:
Gene Forte
Mentor Graphics
503.685.1193
gene_forte@mentor.com
Sonia Harrison
Mentor Graphics
503.685.1165
sonia_harrison@mentor.com
Manufacturing Variability Press Releases
- Mentor Graphics Teams with OpSIS Foundries and Lumerical Solutions on PDK Development for IME Silicon Photonics Process (May 22, 2013)
- L-3 Link Simulation & Training Cuts Engineering Change Orders by Ninety Percent Using Capital Software from Mentor Graphics (May 21, 2013)
- Mentor and Tezzaron Optimize Calibre 3DSTACK for 2.5/3D-ICs (May 20, 2013)
- CNH Enhances Electrical Design Capabilities with Latest Mentor Graphics Capital and VeSys Software (May 15, 2013)
- Mentor Graphics Pyxis Platform and PDK Automation Process Adopted by MagnaChip Semiconductor (May 14, 2013)
- Mentor Graphics Announces Software Vital For Wire Harness Supplier Competitiveness (May 8, 2013)
- Mentor Graphics Accelerates SoC and Embedded System Delivery with a Native Embedded Software Environment for Pre- and Post-Silicon Development, Embedding QEMU, SystemC and Emulation (Apr 22, 2013)
- Mentor Graphics Announces Successful Integration of the MontaVista Automotive Technology Platform into a Yocto Project 1.3 and GENIVI 3.0-compliant Platform (Apr 18, 2013)
- BridgePoint from Mentor Graphics Provides Agilent GC Instrumentation Division an Efficient Methodology for Embedded Software Development (Apr 17, 2013)
- Mentor Graphics Collaborates with The University of Nottingham Ningbo China (UNNC) to Open Integrated Circuit Design Laboratory (Apr 15, 2013)