Silicon Test and Yield Analysis
Diagnosis-Driven Yield Analysis — Faster Track to Root Cause and Improved Yield
ICs developed at advanced technology nodes of 65 nm and below exhibit an increased sensitivity to small manufacturing variations. New design-specific and feature-sensitive failure mechanisms are on the rise. Complex variability issues that involve interactions between process and layout features can mask systematic yield issues. Without improved yield analysis methods, time-to-volume is delayed, mature yield is suboptimal, and product quality may suffer, thereby threatening your product’s profitability.
Diagnosis-driven yield analysis is a methodology that uses production test results, volume scan diagnosis, and statistical analysis to identify the cause of yield loss before any physical failure analysis is done. This methodology can reduce the root cause cycle time 75-90%.
The diagnosis-driven yield analysis solution from Mentor Graphics combines the automated diagnosis capabilities in Tessent™ Diagnosis with advanced statistical analysis and data mining provided by Tessent YieldInsight™. Leveraging manufacturing test results and design data, this solution enables IC manufacturers to identify the probable cause of yield loss. This solution significantly reduces the time it takes to identify the root cause of yield loss and identifies yield limiters that may otherwise go unnoticed.
Tessent YieldInsight
Mentor Graphics Tessent® YieldInsight statistically analyzes diagnosis data to identify and separate systematic yield limiters before failure analysis. This eliminates the need for costly physical localization... View Product Overview
Tessent Yield Insight - Diagnosis-Driven Yield Analysis
(PDF, 1001kb) Leveraging Test for Yield Analysis
At technology nodes of 65 nm and smaller, ramping and maintaining high yield is
a challenge. Manufacturing processes are still being... View Datasheet
Yield Learning with Tessent Diagnosis and Tessent YieldInsight
Technology Overview: Indentifying the root cause of yield loss can take weeks or months using traditional methods. Learn how using the Tessent yield analysis solutions will significantly shorten this time. View Technology Overview
Faster Time to Root Cause with Diagnosis-Driven Yield Analysis w/DFM
White Paper: This whitepaper describes the benefits of implementing a diagnosis-driven yield analysis flow using the Tessent® Diagnosis and Tessent... View White Paper
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Manufacturing Variability Challenges
Design
Mentor’s variability-aware/timing-aware place and route system delivers “correct-by-construction” layouts concurrently optimized for both performance and yield across any number of modes and corners.
Enhance
Mentor’s Calibre® platform provides the fastest, most accurate, and most reliable integrated verification, extraction and design-for-manufacturing (DFM) platform for both library cells and full chips.
Fabricate
Mentor’s fast, accurate, and cost-effective mask resolution enhancement and data prep flows ensure quick mask turnaround and high manufacturability at 65 nm, 45 nm, 32 nm and beyond.
Ramp
Mentor’s production yield solution combines the power of diagnosis-driven yield analysis and high-quality manufacturing test to accelerate yield ramp.
Manufacturing Variability Resources
Assessment and comparison of different approaches for mask write time reduction
White Paper: The extension of 193nm exposure wavelength to smaller nodes continues the trend of increased data complexity and subsequently longer mask writing times. We review the data preparation steps post tapeout,... View White Paper
Can fast Rule-Based Assist Feature Generation in random-logic Contact Layout provide sufficient Process Window?
White Paper: Semiconductor manufacturing is continuously ramping up the yield of technology processes with transistor dimensions well below the exposure wave length. Light di raction e ects limit the resolution of pattern... View White Paper
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View all Manufacturing Variability Resources: White Papers, Datasheets, Web Seminars, and more