Resources

Showing: 1-10 of 76 total resources
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Resource Type Design Area
Can fast Rule-Based Assist Feature Generation in random-logic Contact Layout provide sufficient Process Window? White Paper IC Manufacturing , IC Design
High Performance Electrical Driven Hotspot Detection Solution for Full Chip Design using a Novel Device Parameter Matching Technique White Paper IC Design
Assessment and comparison of different approaches for mask write time reduction White Paper IC Manufacturing
Integration of Pattern Matching© into Verification Flows White Paper IC Manufacturing , IC Design
Automated Yield Enhancements Implementation on full 28nm Chip: Challenges and Statistics White Paper IC Design
A Hybrid model/pattern based OPC approach for improved consistency and TAT White Paper IC Manufacturing , IC Design
Smart Double-Cut Via Insertion Flow With Dynamic Design-Rules Compliance For Fast New Technology Adoption White Paper IC Design
Aeroflex Broadens Its Mixed-Signal Tool Kit with Questa ADMS and OVM Success Story IC Design
Advanced Memory Cell Characterization with Calibre xACT 3D White Paper IC Design
STMicroelectronics & Questa ADMS Success Story IC Design
Showing: 1-10 of 76 total resources
1-10 | 11-20 | 21-30 | 31-40 | 41-50 | 51-60 | 61-70 | 71-76

Manufacturing Variability Challenges

Design

Mentor’s variability-aware/timing-aware place and route system delivers “correct-by-construction” layouts concurrently optimized for both performance and yield across any number of modes and corners.

Enhance

Mentor’s Calibre® platform provides the fastest, most accurate, and most reliable integrated verification, extraction and design-for-manufacturing (DFM) platform for both library cells and full chips.

Fabricate

Mentor’s fast, accurate, and cost-effective mask resolution enhancement and data prep flows ensure quick mask turnaround and high manufacturability at 65 nm, 45 nm, 32 nm and beyond.

Ramp

Mentor’s production yield solution combines the power of diagnosis-driven yield analysis and high-quality manufacturing test to accelerate yield ramp.