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Resources

Showing: 11-35 of 66 total resources
1-25 | 26-50 | 51-66
Resource Type Design Area
The Roadmap to LFD Value: Quantifying a Return on Investment in Calibre LFD White Paper IC Design
The Impact of 14-nm Photomask Uncertainties on Computational Lithography Solutions White Paper IC Manufacturing
Smart Double-Cut Via Insertion Flow With Dynamic Design-Rules Compliance For Fast New Technology Adoption White Paper IC Design
Signal Integrity Optimization with Olympus-SoC White Paper IC Design
Scan Failure Diagnosis - YieldAssist / Calibre Demo On-demand Web Seminar Silicon Test and Yield Analysis , IC Design
STMicroelectronics & Questa ADMS Success Story IC Design
Roadmap to sub-nanometer OPC model accuracy White Paper IC Manufacturing
Restrictive Design Rules and Their Impact on 22 nm Design and Physical Verification White Paper IC Design
Removing the Gap Between ECAD and MCAD Design White Paper PADS Home Page
Reducing Physical Verification Cycle Times with Debug Innovation On-demand Web Seminar IC Design
Questa ADMS Success Story IC Design
Physical Verification: The Road Ahead On-demand Web Seminar IC Design
Pattern Matching: Blueprints for Further Success White Paper Silicon Test and Yield Analysis , IC Design
Overview of Calibre PERC Technology Overview IC Design
On Accurate Full-Chip Extraction and Optimization of TSV-to-TSV Coupling Elements in 3D ICs White Paper IC Design
Olympus-SoC Overview Technology Overview IC Design
OPC model prediction capability improvements by accounting for mask 3D-EMF effects White Paper IC Manufacturing
Multi-Corner-Multi-Mode P&R for Timing, Power, and SI Closure On-demand Web Seminar IC Design
Mastering the Magic of Multi-Patterning White Paper IC Design
Mask data preparation flow for advanced technology nodes White Paper IC Manufacturing
Litho Friendly Design Kit: A Tool of DFM Strategy White Paper IC Design
Layout-Aware Diagnosis: Better Failure and Yield Analysis On-demand Web Seminar Silicon Test and Yield Analysis
Layout Pattern Dependence-Aware Highly Accurate Simulation Flow with Calibre nmLVS White Paper IC Design
Integration of Pattern Matching© into Verification Flows White Paper IC Manufacturing , IC Design
Integrated DFM framework for dynamic yield optimization White Paper IC Design
Showing: 11-35 of 66 total resources
1-25 | 26-50 | 51-66