HyperLynx DDRx Interface Analysis
The HyperLynx DDRx Interface Analysis course will help you gain an in-depth understanding of DDRx interfaces and how to use the HyperLynx software to analyze signal integrity, crosstalk, and timing of DDRx in both pre- and post- layout stages of the design process. View course details ↓
Full instructor-led courses in a Mentor training facility, with complete course materials and access to classroom computers.
|Nov 11–12||Singapore||9–5 PM
|Jan 5–6||Bangalore||9:30–5:30 PM
|Jan 22–23||Fremont||9–5 PM
|Feb 19–20||Longmont||9–5 PM
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The HyperLynx DDRx Interface Analysis course will help you gain an in-depth understanding of DDRx interfaces and how to use the HyperLynx software to analyze signal integrity, crosstalk, and timing of DDRx in both pre- and post- layout stages of the design process.
Hands-on lab exercises will reinforce what is discussed during the lectures and provide you with extensive tool usage experience under the guidance of our industry expert instructors.
YOU WILL LEARN HOW TO
- Identify different DDRx interface types
- Calculate the data rate and frequency for DDRx address and data busses
- Set up the DDRx Wizard in LineSim and BoardSim
- Interpret the timing parameters at the DRAM and DDRx controller by using the DDRx Wizard
- Create timing models for a DDRX controller
- Interpret the DDRx analysis results Perform timing analysis for the DDRx interface
- Calculate the jitter margins
- Use the write leveling options in DDrx Wizard
Throughout this course, extensive hands-on lab exercises provide you with practical experience using HyperLynx SI software. Hands-on lab topics include:
- Preparing the DDRx Wizard for pre- and post-layout analyses
- Preparing IBIS buffer models for DDRx analysis
- Deriving timing parameters for a controller timing model Creating timing model for the controller
- Setting up the DDRx Wizard
- Running and analyzing the result of timing simulation
- Simulation and analyzing jitter results
- Simulating and analyzing round-trip time results for DDRx interface
- Simulating and analyzing write leveling options
Hardware Designers, and Signal Integrity Specialists who will use HyperLynx and need to use DDRx analysis capability of the software.
Familiarity with HyperLynx SI software
Familiarity with High-Speed PCB concepts
Familiarity with Windows operating systems
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