Sign In
Forgot Password?
Sign In | | Create Account

HyperLynx High-speed Serial Interface Analysis

Categories: HyperLynx

The HyperLynx High-speed Serial Interface Analysis course will help you learn how to use HyperLynx to analyze SERDES channels in pre and post-layout. View course details ↓


Full instructor-led courses in a Mentor training facility, with complete course materials and access to classroom computers.

Date Location Time Language Price
Mar 192015 Bangalore India 9:30–5:30 PM
English 19,710 INR Register
Mar 202015 Hsinchu City Taiwan 9–5 PM
Mandarin 11,550 TWD Register
Apr 32015 Singapore Singapore 9–5 PM
English 500 USD Register
Apr 222015 Munich Germany 9–5 PM
German 650 EUR Register
May 222015 Singapore Singapore 9–5 PM
English 500 USD Register
Don't see the class you need? Request a class

Course Details

The HyperLynx High-Speed Serial Interface Analysis course will help you gain an in-depth understanding of high speed serial interfaces e.g. SERDES and how to use the HyperLynx software to analyze their signal integrity, crosstalk, and timing in both pre- and post- layout stages of the design process.

Hands-on lab exercises will reinforce what is discussed during the lectures and provide you with extensive tool usage experience under the guidance of our industry expert instructors.

You will learn how to

  • Identify high-speed serial interfaces
  • Distinguish between parallel and serial interfaces
  • Explore factors affecting a high-speed channel performance in LineSim
  • Make trade-offs from simulation results
  • Generate physical constraints for the serial interface
  • Create post-layout SERDES channel topology
  • Assign models to various component on a SERDES channel
  • Simulate an eye diagram using the Fast Eye Wizard
  • Use IBIS-AMI channel analyzer to simulate SERDES channels
  • Implement a 3D via model and simulate it in LineSim

Hands-on Labs

Throughout this course, extensive hands-on lab exercises provide you with practical experience using HyperLynx SI software. Hands-on lab topics include:

  • Exploring the a PCI Express SERDES design
  • Planning stackup for pre-layout analysis of a SERDES channel
  • Analyzing loss for various configurations of the channel
  • Checking for the transmitter and receiver compliance
  • Simulating to derive constraint for the entire SERDES channel
  • Verifying a SERDES channel in post-layout mode
  • Setting up advanced connector models for MultiBoard projects
  • Simulating with the FastEye Wizard
  • Using IBIS_AMI channel analyzer wizard
  • Creating and simulating 3D via models

Course Information

Intended for

Signal Integrity specialists and hardware designers who use HyperLynx software to design and analyze serial channels (SERDES)


Familiarity with HyperLynx SI software

Familiarity with High-Speed PCB concepts

Course Part Number
  • Live online: 260780
  • Classroom: 260801
Online Chat