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HyperLynx Advanced High-Speed PCB Analysis

Categories: Expedition/Xpedition, HyperLynx

This course will help you understand the application of HyperLynx SI to solve real world signal integrity problems. It covers two design areas in both pre- and post-layout: source-synchronous design analysis and SERDES design analysis View course details ↓

There are no classes for this course that are open for registration. Request a class

Course Highlights

You will learn how to

  • Explore and differentiate DDRx and SERDES designs
  • Apply signal integrity concepts to DDRx and SERDES designs
  • Analyze DDRx memory interface for signal integrity in pre-layout phase
  • Analyze crosstalk for single-ended and differential nets in DDRx designs
  • Perform timing analysis for DDRx memory interface
  • Set up and use DDRx wizard for post-layout analysis of DDRx memory interface
  • Generate Eye Diagrams in HyperLynx
  • Analyze loss for various configurations of SERDES channels in pre-layout phase
  • Perform post-layout analysis of SERDES channels
  • Use Fast Eye Diagram wizard for SERDES channels

Hands-on labs

  • Getting familiar with DDR2 and PCI Express designs
  • Pre-layout SI analysis of DDR2 memory interface
  • Pre-layout crosstalk analysis of DDR2 memory interface
  • Pre-layout timing analysis of DDR2 memory interface
  • Post-layout verification of DDR2 memory interface
  • Pre-layout analysis of SERDES channel
  • Post-layout verification of SERDES channel

Course Information

Prerequisites

Familiarity with High-Speed PCB concepts

Familiarity with the use of HyperLynx software. (Taking basic HyperLynx Signal Integrity class is preferred)

Familiarity with Windows operating systems

Course Part Number
  • Classroom: 234951
  • Live online: 241799
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