HyperLynx Advanced High-Speed PCB Analysis
Categories: Expedition, HyperLynx, PADS
This course will help you understand the application of HyperLynx SI to solve real world signal integrity problems. It covers two design areas in both pre- and post-layout: source-synchronous design analysis and SERDES design analysis View course highlights ↓
Scheduled classes
| Date | Location | Time | Language | Price | |
|---|---|---|---|---|---|
| Jul 9–11 | Munich | 9–5 PM CEST |
German | 1,950 EUR | Register |
| Jul 29–31 | Herzliya | 9–5 PM IDT |
English | 4,048 ILS | Register |
| Aug 26–28 | Marlborough | 9–5 PM EDT |
English | 2,100 USD | Register |
| Oct 2–4 | Singapore | 9–5 PM SGT |
English | 1,500 USD | Register |
| Oct 16–18 | Longmont | 9–5 PM MDT |
English | 2,100 USD | Register |
| Oct 22–24 | Munich | 9–5 PM CEST |
German | 1,950 EUR | Register |
| Dec 18–20 | Marlborough | 9–5 PM EST |
English | 2,100 USD | Register |
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Course Highlights
You will learn how to
- Explore and differentiate DDRx and SERDES designs
- Apply signal integrity concepts to DDRx and SERDES designs
- Analyze DDRx memory interface for signal integrity in pre-layout phase
- Analyze crosstalk for single-ended and differential nets in DDRx designs
- Perform timing analysis for DDRx memory interface
- Set up and use DDRx wizard for post-layout analysis of DDRx memory interface
- Generate Eye Diagrams in HyperLynx
- Analyze loss for various configurations of SERDES channels in pre-layout phase
- Perform post-layout analysis of SERDES channels
- Use Fast Eye Diagram wizard for SERDES channels
Hands-on labs
- Getting familiar with DDR2 and PCI Express designs
- Pre-layout SI analysis of DDR2 memory interface
- Pre-layout crosstalk analysis of DDR2 memory interface
- Pre-layout timing analysis of DDR2 memory interface
- Post-layout verification of DDR2 memory interface
- Pre-layout analysis of SERDES channel
- Post-layout verification of SERDES channel
Hear from an instructor why you should sign up for this class. View Video
Course Details
| Prerequisites |
Familiarity with High-Speed PCB concepts Familiarity with the use of HyperLynx software. (Taking basic HyperLynx Signal Integrity class is preferred) Familiarity with Windows operating systems |
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