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Introduction to Vista

Categories: Vista

The Introduction to Vista™ course will get you started with ESL design without any knowledge of ESL modeling or tools. This course shows you how to model, simulate, and debug an entire ESL system from scratch in one day. View course details ↓

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Course Highlights

In order to design complex hardware and software systems, the design community is embracing Electronic System Level (ESL) design. At first glance, the move to a higher level of abstraction like ESL looks daunting. Do you really need to learn C++, SystemC, and Transaction Level Modeling (TLM) modeling, in addition to becoming an expert on a new set of EDA tools before you can reap the benefits of ESL design?

The Introduction to Vista™ course will get you started with ESL design without any knowledge of ESL modeling or tools. This course shows you how to model, simulate, and debug an entire ESL system from scratch in one day. You will see how Vista automates this process, so that you can spend time investigating architectural trade-offs and design analysis and modification to meet your specifications.

Hands-on lab exercises reinforce lecture and discussion topics under the guidance of our industry expert instructors.

You will learn how to

  • Understand the overall goals and objectives targeted in system modeling
  • Understand how Vista achieves these goals
  • Model a data process model and a simple testbench to drive it
  • Create a block diagram of the system
  • Simulate and analyze the functionality of the system
  • Understand transactions
  • Model timing and power at the system level
  • Understand how Vista allows you to modify timing and power without changing functionality
  • Simulate and analyze timing and power effects on the system
  • Expand your system to include a bus and other peripherals on the bus
  • Modify the testbench to account for new system components
  • Make architectural trade-offs

Hands-on labs

Throughout this course, extensive hands-on lab exercises provide you with practical experience using Vista. Hands-on lab topics include:

  • Building a simple, functional system in order to learn the modeling process and Vista flow
  • Adding timing and power information to the simple system and analyzing the results in simulation
  • Building out a complete, bus-based system based on the simple system that you built
  • Architectural exploration using the complete system

 

Course Information

Intended for

Systems engineers responsible for HW/SW architecture
 

Prerequisites

Familiarity with concepts of:

  • Computer and system architecture
  • Hardware functionality and timing modeling
  • Programming in C++; SystemC knowledge helpful and encouraged, but not required
  • Basic understanding of simulation concepts helpful  
Course Part Number
  • Classroom: 257593
  • Live online: 257594
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