Precision Synthesis: FPGA Design
Categories: FPGA
The Precision Synthesis: FPGA Design course will help you understand how to use Precision Synthesis to synthesize your design from HDL RTL to technology specific gate-level netlist. View course highlights ↓
Scheduled classes
There are no classes currently scheduled for this course. Request a class
Course Highlights
You will learn how to
- Create a design project using Precision Synthesis
- Manage design project data in Precision Synthesis
- Set up constraints to optimize your design
- Read timing reports and identify timing bottlenecks
- View the synthesized design results
- Create block based designs
- Use the command line and scripts
- Proceed to the vendor-specific P&R stage
Hands-on labs
- Basic synthesis flow
- Setting Constraints
- Quality of Results Improvement
- Physically Aware Synthesis
- Black Box Flow
- Bottom-Up Flow
- Incremental Synthesis
- Resource Management
Course Details
| Prerequisites |
Familiarity with VHDL, Verilog, or SystemVerilog for RTL design Familiarity with concepts of RTL logic synthesis Familiarity with Windows operating systems |
| Course Part Number |
|
| Products Covered | |
| Guides |