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Tessent TestKompress and Advanced Topics

Categories: Tessent

This course introduces Embedded Deterministic Test (EDT™) technology and Tessent™ TestKompress® to engineers already familiar with Design-for-Test, but find that existing tools do not adequately deal with smaller (< 130 nm) geometries. It is especially targeted towards those engineers working with ASIC/IC/SOC design projects where pattern size or application time are issues. View course highlights ↓


Our instructor-led online classes offer all the benefits of classroom training without the travel. Participate in a live classroom experience, complete with hands-on exercises and course materials, directly from your office.

Date Time Language Price
May 27–292014 8–2 PM
English 1,600 USD Register


Full instructor-led courses in a Mentor training facility, with complete course materials and access to classroom computers.

Date Location Time Language Price
May 152014 Hsinchu City Taiwan 9:30–5:30 PM
Mandarin 11,000 TWD Register
Jun 25–262014 Austin Texas 9–5 PM
English 1,600 USD Register
Jul 23–242014 El Segundo California 9–5 PM
English 1,600 USD Register
Sep 10–112014 Tempe Arizona 9–5 PM
English 1,600 USD Register
Nov 19–202014 Fremont California 9–5 PM
English 1,600 USD Register
Jan 19–202015 Austin Texas 9–5 PM
English 1,600 USD Register
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Course Highlights

You will learn how to

  • Access help and navigate documentation for Tessent TestKompress
  • Use Tessent TestKompress in three different IP generation flows
  • Perform EDT Automation with Tessent TestKompress
  • Compare compression results
  • Create Tessent TestKompress test patterns
  • Troubleshoot common DRC violations
  • Perform At-speed testing
  • Simulate test patterns and troubleshoot mismatches
  • Use Tessent TestKompress and Boundary Scan in the same flow

Hands-on labs

  • Integrating Tessent TestKompress into Gate-level, RTL-level, and Modular Design Flows
  • Exploring Tessent TestKompress Logic Features and Options
  • Understanding and Troubleshooting Common DRC Violations
  • Determining Compression and Performance
  • Using At-speed Testing
  • Debugging Simulation Mismatches
  • Using Tessent TestKompress with Boundary Scan
  • Graphically Viewing Data and Troubleshooting Common DRCs

Course Details


A background in Design-for-Test

Tessent Scan and ATPG training course

Course Part Number
  • Instructor-led: 221302
  • Live online: 239702
Products Covered
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