HsinChu City, Taiwan Training Center
11F, No. 120, Sec. 2, Gongdao 5th Road,
Hsinchu City, Taiwan
886 3 513 1000
886 3 573 4734
View Map
Classes
| Course Title | Next Date | Category | ||||
|---|---|---|---|---|---|---|
|
Calibre TVF
This course will help you unleash the powers of TVF to make your SVRF files more compact, easier to maintain, and more powerful. Using several examples, you will learn how to incorporate TVF functionality into your rule files to make writing SVRF rules easier. More upcoming dates (2 total)
|
7/11/13 | Calibre | ||||
|
Calibre xRC Parasitic Extraction
This course presents the most in-depth coverage of these topics available, extending your knowledge base far beyond existing documentation. Attendees should see immediate ROI in terms of both ramp-up time with the Calibre xRC tools and effectiveness. More upcoming dates (2 total)
|
7/18/13 | Calibre | ||||
|
HyperLynx Signal Integrity Analysis
This course will help you understand basic signal integrity, crosstalk, EMI concepts and pre-and post layout stages of the design process. More upcoming dates (2 total)
|
7/24/13 | Expedition, HyperLynx, PADS | ||||
|
Calibre Fundamentals: Performing DRC/LVS
Learn how to leverage the full power of Calibre nmDRC and Calibre nmLVS by attending the ‘Calibre Fundamentals: Performing DRC/LVS’ course. This course will teach you to effectively use Mentor Graphics Calibre nmDRDC and Calibre LVS software in your layout verification flow and will empower you to analyze DRC and LVS results successfully in coordination with a layout editor. The lecture modules will guide you through the various concepts underlying state-of-the-art layout verification techniques and specific aspects of the Calibre nmDRC and Calibre nmLVS toolset. More upcoming dates (1 total)
|
8/28/13 | Calibre | ||||
|
Calibre Advanced Topics: nmLVS Debug Case Studies
Layout Versus Schematic (LVS) verification has always played a critical role in the IC design process. Calibre nmLVS continues to be the pre-eminent tool for this task. Recent Calibre enhancements have significantly extended the tool’s capabilities and have helped to streamline the LVS debugging task. This course will introduce you to all of these new features through a series of LVS case studies. More upcoming dates (1 total)
|
9/4/13 | Calibre | ||||
|
Calibre Fundamentals: Writing DRC/LVS Rules
This course will teach you to effectively write and maintain Calibre nmDRC and nmLVS rule decks for your semiconductor processes. In this class, you will extensively study the Standard Verification Rule Format (SVRF) language used in Calibre rule decks. The lecture modules will guide you through the various concepts underlying state-of-the-art layout verification techniques and specific aspects of the Calibre toolset. Hands-on lab exercises will reinforce lecture topics and provide you with rule writing experience under the guidance of our industry expert instructors. More upcoming dates (1 total)
|
9/10/13 | Calibre | ||||
|
Tessent Scan and ATPG
This course teaches you how to insert full scan in a design using the DFTAdvisor™ tool flow, and shows you how to create high quality test patterns using the ATPG tool flow. This course also teaches you ATPG compression techniques along with industry-standard Tessent TestKompress compression techniques. More upcoming dates (1 total)
|
9/24/13 | Tessent | ||||
|
Tessent TestKompress and Advanced Topics
This course introduces Embedded Deterministic Test (EDT™) technology and Tessent™ TestKompress® to engineers already familiar with Design-for-Test, but find that existing tools do not adequately deal with smaller (< 130 nm) geometries. It is especially targeted towards those engineers working with ASIC/IC/SOC design projects where pattern size or application time are issues. More upcoming dates (1 total)
|
9/26/13 | Tessent | ||||
|
Calibre Advanced Topics: Mastering Calibre eqDRC
Calibre® eqDRC represents an important breakthrough in physical verification, making it possible for anyone performing design rule and LVS checks to truly do more with less. More upcoming dates (1 total)
|
10/1/13 | Calibre | ||||
|
Analog Designer Analog Simulation
This course covers the most important aspects of setting up the Analog Designer tool. It covers setting pointers to models libraries as well as how to develop new libraries and manipulate models. The functionality of the Analog Waveform Displayer (AWD) is described in detail, as well as the Waveform Calculator. All the domain analysis functionality is thoroughly explored, as well as statistical analysis. More upcoming dates (1 total)
|
10/8/13 | Expedition | ||||
|
Eldo Simulation
During this course you will acquire the skills needed to maximize your usage of Eldo® and realize its full impact on your analog/mixed signal verification process. More upcoming dates (1 total)
|
10/9/13 | Eldo |
Recommended accommodations
Please mention the Mentor Graphics Training Center when booking your hotel accommodations, as we frequently negotiate special rates for students.
Contact us
Mentor Graphics Education Services
1-800-345-2308
Email Us