Longmont, CO (Denver) Training Center
1811 Pike Road
Longmont, Colorado
720-494-1000
720-494-0457
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Classes
| Course Title | Next Date | Category | ||||||
|---|---|---|---|---|---|---|---|---|
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DxDesigner for PADS Flow
Using the DxDesigner tools suite, you will gain proficiency in project management with Dashboard, schematic capture with DxDesigner, part selection using DxDataBook™, and much more. You will also learn how to prepare your final schematic for interfacing with the Mentor Graphics® PADS® Layout tool. More upcoming dates (2 total)
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6/25/13 | DxDesigner, PADS | ||||||
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SystemVerilog Universal Verification Methodology Advanced
This course is for engineers with experience in developing SystemVerilog verification environments using the Universal Verification Methodology (UVM). More upcoming dates (1 total)
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7/9/13 | HDL & Other Languages, SystemVerilog | ||||||
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DxDesigner for Expedition PCB Flow
This course will help you to improve your knowledge and skills with Design Definition solutions. More upcoming dates (3 total)
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7/15/13 | DxDesigner, Expedition | ||||||
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CES for Expedition PCB
This Course covers all the necessary skills required to use CES efficiently and effectively in DxDesigner-Expedition flow. More upcoming dates (1 total)
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7/18/13 | Expedition | ||||||
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Expedition PCB Advanced
This course will help you understand many of the advanced layout options available for Expedition PCB, including many of the purchasable utilities. More upcoming dates (2 total)
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8/5/13 | Expedition | ||||||
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SystemVerilog Universal Verification Methodology
This 4-day course is for engineers who are interested in developing SystemVerilog verification environments using the Universal Verification Methodology (UVM). More upcoming dates (1 total)
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8/13/13 | HDL & Other Languages, SystemVerilog | ||||||
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PADS Layout
This course will teach you the workflow of laying out a printed circuit board using the latest version of Mentor Graphics PADS Layout. You will be guided through the steps necessary to design a printed circuit board. Course highlights include creating physical components, importing netlists, adding/updating parts, routing connections, generating reports and Gerber information. More upcoming dates (3 total)
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8/20/13 | PADS | ||||||
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PADS Layout Advanced
The PADS Advanced Layout course will help you understand advanced PCB design techniques for the use in printed circuited design. More upcoming dates (2 total)
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8/23/13 | PADS | ||||||
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Expedition PCB for Design Review
The Expedition® PCB for Design Review course will help design engineers learn a few basic features of Expedition PCB so they can conduct a successful design review. More upcoming dates (1 total)
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8/26/13 | Expedition | ||||||
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RF Design in DxD/Expedition
This course will help you efficiently implement RF and mixed technology RF designs on an Expedition PCB. In addition, it will teach the process of moving the data back and forth between a DXD/Expedition environment and Microwave office and Agilent ADS tools. More upcoming dates (2 total)
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8/27/13 | DxDesigner, Expedition | ||||||
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Expedition PCB Flow: Automation and Scripting
This course will help you understand how you can customize the PCB flow tools, DxDesigner® and Expedition, to both integrate the tools into your process flows as well as enhance their capabilities. More upcoming dates (1 total)
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9/10/13 | Expedition | ||||||
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Expedition PCB Introduction
Expedition® PCB Introduction presents the workflow and methods of laying out a printed circuit board using the latest version of Mentor Graphics Expedition PCB. From fundamental library concepts, to the PCB editor environment and the PCB layout process, you will gain hands-on experience in integrating a source schematic, placing and routing the board, and outputting the fabrication data. More upcoming dates (2 total)
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9/16/13 | Expedition | ||||||
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PADS Router
The PADS Router course teaches you the workflow of completing designs using the latest version of Mentor Graphics PADS Router. More upcoming dates (1 total)
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9/26/13 | PADS | ||||||
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HyperLynx Signal Integrity Analysis
This course will help you understand basic signal integrity, crosstalk, EMI concepts and pre-and post layout stages of the design process. More upcoming dates (2 total)
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10/14/13 | Expedition, HyperLynx, PADS | ||||||
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HyperLynx Advanced High-Speed PCB Analysis
This course will help you understand the application of HyperLynx SI to solve real world signal integrity problems. It covers two design areas in both pre- and post-layout: source-synchronous design analysis and SERDES design analysis More upcoming dates (1 total)
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10/16/13 | Expedition, HyperLynx, PADS | ||||||
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Valor NPI Introduction
This course covers the Valor NPI operations for incorporating Design for Manufacturing (DFM) analysis into your PCB design process. At the conclusion of this course the attendee will understand the navigation of the Valor NPI system, general tool usage, and analysis review. Focus will be placed on a “Best Practices” process flow that will guide the user through the stages of ODB++ export and EDA input, through analysis and resolution, and finishing with output and reporting. More upcoming dates (1 total)
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10/22/13 | Expedition, Valor | ||||||
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Library Manager for DxDesigner to Expedition PCB Flow
This course will give you the skills necessary to create, protect, add to and change the different data types in your Central Library. The lecture modules discuss the Central Library philosophy as well as how to use the Library Manager tools and how to best interface library objects into your design process. More upcoming dates (1 total)
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11/4/13 | DxDesigner, Expedition | ||||||
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SystemVerilog for Verification
This intensive, practical course is intended for Verification Engineers interested in the latest verification enhancements to SystemVerilog. While many engineers may have extensive verification experience this course will introduce best-practice usage of SystemVerilog features like Object Oriented programming, Constrained Randomization and Functional Coverage. More upcoming dates (1 total)
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11/19/13 | HDL & Other Languages, SystemVerilog | ||||||
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SystemVerilog Open Verification Methodology
This course is for engineers who are interested in developing SystemVerilog verification environments using the Open Verification Methodology (OVM). More upcoming dates (1 total)
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1/7/14 | HDL & Other Languages, SystemVerilog | ||||||
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HyperLynx Power Integrity Analysis
This course will help you understand the basic concepts of power distribution and delivery on a PCB, power integrity simulation, identification of power distribution problems on your PCB, and fixing these problems early in the design cycle. More upcoming dates (1 total)
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1/15/14 | Expedition, HyperLynx, PADS |
Recommended accommodations
Please mention the Mentor Graphics Training Center when booking your hotel accommodations, as we frequently negotiate special rates for students.
Note: Approximate travel time from Denver International Airport is 60 minutes