Catapult C
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Duration: 3 Days
Pricing:$2,400 USD
Couse Part Number: 217481
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Description
This class in intended to introduce you to the tools and techniques needed to design, synthesize and verify hardware starting from C++. Students will learn how to modify C models to be synthesizable and how to produce verified hardware quickly. The micro-architecture and interface design space will also be explored in order to get the most optimal hardware design.
The hands-on labs will reinforce the lectures, providing you with the chance to get comfortable with Catapult C in a working environment under the guidance of our expert instructors. The third day of the class will be a mini “boot camp” where you can work on your own designs, or work with those supplied by the instructor.
Students are strongly encouraged to review C++, as this will not be covered in the class. (A good book is “C++, How to Program” by Dietel and Dietel).
You will learn how to
- Design using Catapult C synthesis tool
- A brief introduction to Catapult C Library Builder Tool
- Write synthesizable C++code
- Use latency and resource constraints to get the smallest design
- Integrate custom IP for synthesis
- Check that the RTL functions and has the right timing
Hands-On Labs
Throughout this course, extensive hands-on lab exercises provide you with practical experience in using Catapult C under the guidance of our expert instructors. Hands-on lab topics include:
- Writing C++ code for synthesis
- Understanding the GUI
- Writing a DCT (Discrete Cosine Transform) function
Audience
- FPGA and ASIC hardware designers
- System designers who wish to use C++ as part of their specification of high level functionality
Prerequisites
- An understanding of C++ is necessary, as this will not be covered in the course
- Basic knowledge of FPGA/ASIC design techniques and procedures
- Experience using ModelSim for traditional simulation
Key Topics
- An Overview of the Design Process
- Design Interface
- Memory Optimization
- Memory Access Reduction, Caching and Memory Architecture
- Loop Optimization - Loop Unrolling, Pipelining and Merging
- Resource Optimization
- Generating Hardware
- Static Code Writing
- Advanced Synthesis Topics
- Hierarchy, Bitwise Arithmetic, Advanced C Design Techniques
- Library Builder - Integrating Custom IP for Synthesis
- Project Management
- Design Verification and Validation