Duration: 3 Days
Pricing: $2,400 USD
Course Part Number: 063159
Contact us for details about training at your site Course Overview
Semiconductor technology today has resulted in ICs that
switch in fractions of a nanosecond and PCBs that clock as low Megahertz are subject to the same high frequency phenomena due to switching edges. This course provides students with the skills to properly design at CAE and CAD to control clock loading and eliminate transmission line effects. The purpose of this course is to provide you with the knowledge to do it right the first time and the tools for recognizing the problems with any proposed high-speed design. Design rules and design processes that insure the PCB will function properly at the prototype stage are also taught. Emphasis is placed upon cost-competitive design without sacrificing the high-speed integrity.
You will learn how to
- Measure and solve cross-talk and noise problems such as over-shoot, ringing, monotonicity, line impedance, and signal topologies
- Measure interconnect delays and set rules for controlling timing errors
- Perform worst case analysis using corners
- Perform signal integrity analysis at the system level such as backplane and plug-in modules
- Do what-if analysis with termination and topology
- Understand IBIS Modeling
- Understand tool fundamentals and the user interface
Hands-On Labs
Throughout this course, extensive hands-on lab exercises provide you with practical tool usage experience under the guidance of our expert instructors. Hands-on lab topics include:
- Finding and locating design information
- Identify the difference between net and class level rules
- Determine the impact of crosstalk due to coupling and distance
- Define crosstalk methods used by IS
- Termination synthesis simulation
- Identifying and correcting noise problems in a design
- Define the difference between simulated and formula delay methods
- Importing and exporting models
- Identify timing changes due to model changes
- Determine the effects of crosstalk on timing
- Model area fills to determine how they affect crosstalk and impedance
- Using corners to define worst case timing
- Identify and correct IBIS model problems
- Embed Spice and VHDL-AMS models in IBIS models
- Generate and implement an EBD model in a design
- Create what-if design in the Electrical Editor
- Create a system level design using plug-in models representing SIMMS plugged into a Baseboard design and determine the results of loading
Audience
- Digital design engineers
- PCB layout personnel
- Design managers
- Test engineers
- EMI/EMC engineers
- IC digital logic designers
- Technicians
- Project Managers of today's high-speed designs
Prerequisites
This course is for anyone who has worked with today's ICs, high-speed designs and PCB layouts. Students should be familiar with UNIX and NT operating systems.
