Duration: 3 Days
Pricing: $2,100 USD
Course Part Number: 213154
Contact us for details about training at your site Course Overview
The course covers transmission line theory, XTK algorithm basics, identifying and correcting signal integrity problems, creating XTK models from extracted data, and translating data from a PCB layout system. Advanced modeling issues, comparing simulation results to measurements, and simulation of complete large systems (backplanes, connectors etc.) are also covered. Throughout the class students are taught strategies for getting highly accurate results in a rapid manner.
Each section of the course includes a hands-on lab to help reinforce the lecture lessons.
You will learn how to
- Get fast, accurate results with XTK
- Perform both pre-layout and post-layout simulation
- Convert PCB databases into XTK format
- Identify and solve signal integrity problems
- Perform several types of analysis including Mont Carlo, crosstalk, multi-board, and What-If analyses
- Create models of drivers, receivers, discrete devices, connectors, and other elements
- Read report files and make measurements
Hands-On Labs
Throughout this course, extensive hands-on lab exercises provide you with practical experience using XTK. Hands-on lab topics include:
- XNS User Interface
- Design Analysis with XTK
- Preparing XTK Databases
- Preparing Models for XTK
- Pre-layout Analysis with XTK
- Multi-board Analysis
- Command Files
- Creating Bus Definitions, Multi-driver Simulations, and Creating Net Classes
- Controlling the Simulator with Modes and Settings
- Post-layout signal integrity analysis projects
Audience
- Engineers and schematic designers who will use XTK to simulate the signal integrity behavior of their designs
- CAD Engineers and Managers who will be responsible for integration of XTK in their design flow
Prerequisites
Familiarity with Windows NT, 2000, XP or UNIX operating systems
Key Topics
- Signal Integrity Analysis
- Transmission line effects
- Types of Signal Integrity problems
- How XTK interprets signal integrity errors
- User Interface
- Product Installation Tree
- Environment Variables
- XTK Methodology
- User Interface
- Report Files
- XNS Database Extraction
- Database Extraction
- Global Control File (.gcf)
- Layout Translators
- Transmission Line Model Processor ( TMP )
- ISF2XTK
- XFX
- XNS
- Device Modeling
- Libraries
- Model Types
- Writing / Converting Models
- Using XTK for pre-layout analysis
- Multi-board Analysis
- TOPSPEC models
- Connector models
- XTK/Spice Co-Simulation
- Bus Specification File ( .bsf )
- Multi-driver Contention File ( .mdc )
- Specific Information File ( .sif )
- Back annotating trace delay to a static timing tool
- Parallel processing your analysis
- Post-layout analysis tips
