IC Station with ICstudio

Duration: 4 Days
Pricing: 2,000 GBP  (2,960 EUR)
Course Part Number: 226321

Description

Education Services can help you acquire the skills needed to maximize your usage of IC Station and realize its full impact on your layout process. This course will empower you to layout VLSI designs directly from the logic, check them for errors, and keep them current with the latest design changes. The lecture modules will guide you through the various concepts and tools associated with IC Station from the basics of creating polygons to more advanced topics like SDL. Hands-on lab exercises will reinforce lecture topics and provide you with extensive tool usage experience under the guidance of our industry expert instructors.  You will learn how to access all of this capability from within ICstudio, Mentor's new central cockpit for managing the complete IC design life cycle (released in 2004, effective with the 2004.2s and later IC Flow releases).

You will learn how to

• Use ICgraphTM in both GE (Geometry Editing) and CBC (Correct by Construction) modes
• Create and manage IC design projects using the powerful ICstudio design cockpit
• Harness the power of Schematic Driven Layout (SDL)
• Use ICdeviceTM.to automatically generate devices in your layout
• Customize automatically-generated devices for your specific layout needs
• Use ICassemble for the effective floorplanning of hierarchical designs
• Use IC Station  routing tools ARoute and IRoute to route leaf cells, sub-blocks, and  block cells.
• Identify layout errors early in the design process using ICshortchecker and CalibreTM
• Use the ECO function to automatically keep all designs up-to-date
• Customize the user interface to streamline IC Station usage and add new functionality

Hands-On Labs

Throughout this course, extensive hands-on lab exercises provide you with practical experience in using IC Station under the guidance of our expert instructors. Hands-on lab topics include:

• Placing and editing polygons on various layers
• Managing designs and design projects using ICstudio
• Laying out a hierarchical design using Schematic Driven Layout
• Routing using ARoute and IRoute
• Checking for shorts using ICshortchecker
• Performing physical verification using Calibre
• Using ICassemble to perform common floorplanning tasks for a large chip
• Using ICdevice to create and edit MOSFETs, resisters, capacitors, vias, and inductors
• Keeping the layout current with the schematic logic using ECO
• Customizing the user interface

Audience

• IC Layout Engineers and Designers
• CAD Engineers and Managers who will be responsible for integrating IC Station into their design flow
• Front-end Design engineers who would like to have a better understanding of the layout process
• Members of CAD support groups who are responsible for increased productivity of VLSI design teams
• Current customers of Mentor’s IC Flow who are switching to the new ICstudio data management environment, and want to reinforce the use of the classic IC Station custom layout tool within the new ICstudio-based IC Flow

Prerequisite

• Basic knowledge of IC Layout techniques and procedures (helpful but not required)
• Some familiarity with UNIX

Key Topics

• Open an existing cell
• Place polygons using ICgraph
• Open the layer palette and set the selectability, visibility, and fill for each layer
• Change the view area using ICgraph viewing commands
• View the transcript
• Open the help bookcase and search for help
• Set up the select filter
• Select an object(s)
• Edit object(s)
• Modify paths and path centerlines
• Use Boolean operations on objects
• Add and change text and property text
• Use ICstudio to create and manage design projects
• Set up a cell for SDL
• Use DLA Layout to place layout instances and ports
• Use ARoute to route both leaf cells and top-level block connections
• Use ICshortchecker to find shorts
• Add cells to a hierarchy
• Use peek to change the visible layers of a hierarchy
• Change editing context and view context
• Flatten a cell
• Create and edit arrays
• Update hierarchical designs
• Load a rule file
• Verify connectivity of your layout against the original schematic with Calibre LVS
• Verify the layout against DRC rulechecks with Calibre DRC
• Define and edit block boundaries with ICassemble
• Automatically place block pins for hierarchical blocks
• Use IRoute to interactively route sub-blocks
• Read in a Verilog netlist into a block
• Stream out the final layout to GDSII
• Create and edit devices in your layout
• Create MOS device subtypes using an initial MOS device as a starting point
• Use ECO
• Create new IC Station functionality
• Customize the user interface by adding new menu items, strokes and hotkeys