White Papers

Ten Ways to Make Your Wiring and Harness Design Faster and Better

Electrical design is getting more complicated - the electrics on even the "simplest" machines are sometimes beyond what the big car makers were doing 25 years back with big engineering teams and... View White Paper

Advanced EDS Design Tools Pave the Way for a Transition to Electric Vehicles

Electric vehicle platforms bring with them a host of new challenges for designers. This white paper will explore how issues range from battery placement to electrical distribution to eliminating crosstalk... View White Paper

Wire Harness Manufacturing Process Management

Wire harnesses are vital components within modern transportation platforms such as aircraft and automobiles because they distribute power and signals between the various devices that deliver electrical... View White Paper

What Race Car Teams Can Learn from Passenger Car Designers

Racing design lags behind its peers in the commodity automobile industry in some key respects, particularly in the realm of electrical design. This paper explains how today’s automated ECAD tools,... View White Paper

Why You Should Optimize Power at the ESL

The opportunities for optimizing a design for power are greatest at the architectural level of abstraction, where the design architecture is determined. The further a design moves downstream the less effective... View White Paper

Realizing ESL with Scalable Transaction Level Models

The OSCI TLM2 standard, scalable transaction-level models, and a methodology built around the Vista™ Model Builder technology overcome the three prevalent concerns about electronic system level design.... View White Paper

A Scalable Approach for TLM Across SystemC and SystemVerilog

There are a number of compelling reasons that SystemC and SystemVerilog should co-exist in advanced verification environments. Hence, many attempts have been made to mix the two languages. The paper addresses... View White Paper

The Advantages of Real-time Trace Debug in Complex Embedded Systems

This paper will discuss the advantages of real-time trace and why, in most situations, real-time trace is the preferred choice among developers who are validating and debugging complex systems or multicore... View White Paper

Dynamic performance & behavior analysis using Mentor Embedded Sourcery Analyzer and LTTng

For Linux systems, the Linux Trace Toolkit can be an invaluable source of trace data providing the raw material needed for performance and behavioral insights. Mentor Embedded Sourcery Analyzer gives engineers... View White Paper

Exploring real-time thread parallelism for embedded SMP

The embedded world is quickly embracing multicore technology. Almost all of the major silicon vendors active in embedded development are offering multicore chips, which include ARM (Cortex A9), PowerPC... View White Paper

Development of Complex Multicore Systems: Tracing Challenges and Concept (Part One)

This white paper is the first paper of a two-part Mentor Embedded multicore white paper series. In this paper, the challenges software developers face when developing, debugging, and validating software... View White Paper

Using Assertions to Satisfy Elemental Analysis

This paper discusses DO-254 and what it requires for verification (including advanced methods for DAL A/B designs), explains the original intent of Elemental Analysis, the way it is typically satisfied... View White Paper

Using FPGA Synthesis to Protect Against Radiation Effects and Soft Errors

Mentor Graphics Precision® Hi-Rel automatically incorporates advanced mitigation circuitry during device-neutral RTL synthesis, thereby providing additional protection through the implementation flow... View White Paper

Understanding electronic IP: common issues and how to find them

Using IP blocks in designs requiring DO-254 compliance is becoming more popular as a way to reduce costs and schedules. However, the use of IP comes with its own problems and pitfalls. A good methodology... View White Paper

Best practice development processes for medical device FPGAs

For FPGA developers working on designs for medical devices, one approach to dealing with regulatory uncertainty is to borrow heavily from design assurance processes in other safety-critical industries,... View White Paper

FPGA Verification with Assertions: Why Bother? A Painless and Easy Step-by-Step Approach to Adopting Assertions

This paper provides a practical, easy, step-by- step set of instructions on how to add assertions to your RTL design. By following the simple guidelines provided in this paper you will benefit by cutting... View White Paper

Unifying Hardware-Assisted Verification and Validation Using UVM and Emulation

Successful approaches to improve verification productivity are to increase the speed of verification and begin validating software/hardware integration very early in the design process. Historically, verification... View White Paper

Questa Covercheck: An Automated Code Coverage Closure Solution

This white paper explores the debugging aspect of code coverage closure, and how Questa CoverCheck’s unique ability of formal technology can automatically generate simulation exclusion files to improve... View White Paper

Veloce System-Level Power Analysis and Verification

Power analysis and verification need to move to the system level, improving upon and extending the capabilities and scope of RTL and gate-level techniques. The performance, capacity, and flexibility of... View White Paper

The Integrated IP Subsystem: A Converging SoC Solution

The consumer device market is witnessing incredible market space convergence between mobile handheld, automotive, and home electronics. IP vendors, engineers, and system design engineers face a multitude... View White Paper

The Evolution in Disk-Drive Storage: How Consumer Electronic Storage Devices will Drive Future Growth

The new CE-ATAinterface standard for handheld devices and consumer electronic portables is quickly emerging as the most promising storage interface standard today. Replacing SATA, CE-ATA addresses many... View White Paper

Ptolemy-Oriented Structural, Reconfigurable, and Heterogeneous Hardware Design, Verification and Synthesis

This paper investigates the suitability of Ptolemy II platform for current complex hardware systems design, modeling, simulation, verification, synthesis and implementation. Systems complexity, lower process... View White Paper

Analog IP Migration Using Design Knowledge Extraction 

Demonstrated in this paper is a technique for automatic circuit resizing between different technologies. It relies on design knowledge extraction, which renders it very fast compared to full optimization... View White Paper

High Speed, Accurate AMS Simulations Reduces Transient Noise in Complex CMOS Circuits

As implementable analog circuit size has increased significantly due to advancements in manufacturing process, analog designers of system large scale integration (LSI) face increasingly difficult problems.... View White Paper

An Innovative Approach to High Frequency Analysis of IC Layouts

Traditional high frequency analysis (HFA) of integrated circuit designs is based on an empirical approach, which is slow and cumbersome. It is costly to develop the initial model for an IC process, and... View White Paper

Achieving Fast and Accurate Extraction of 3D-IC Layout Structures

The electronics industry is devoting a lot of energy to exploring “More than Moore’s Law” approaches that drive continued value scaling through system integration, rather than (or in addition... View White Paper

Solving Electrostatic Discharge Design Issues with Calibre® PERC™

With the progress of technology nodes, circuit designers are now encountering challenging circuit reliability issues that have no simple solutions. Calibre PERC delivers fast, comprehensive and accurate... View White Paper

Mask data preparation flow for advanced technology nodes

The trend to reduce critical features dimension has dramatically increased design file size. Design tape–out flows at the 28 nm technology node handle post-OPC data files that reach hundreds of gigabytes.... View White Paper

Roadmap to sub-nanometer OPC model accuracy

OPC models describe the entire patterning process, including photomask, optics, resist, and etch as a set of separately characterized modules. It is difficult, however, to definitively calibrate the optics... View White Paper

Weighting evaluation for improving OPC model quality by using advanced SEM-Contours from wafer and mask

In this study, the weighing function of Calibre ContourCal, was evaluated using a familiar OPC data set used in previous published research. We discuss the quality of OPC model by applying different weighting... View White Paper

OPC model prediction capability improvements by accounting for mask 3D-EMF effects

As mask feature sizes have shrunk well below the exposure wavelength, the thin mask of Kirchhoff approximation breaks down and 3D mask effects contribute significantly to the through-focus CD behavior of... View White Paper

How Successful OEMs Improve Product Quality while Saving Time and Money with PCB NPI

This paper identifies how Design for Manufacturing (DFM) and smoother handoffs between design and manufacturing avoid costly problems and wasted effort during NPI, resulting in improved efficiency and PCB... View White Paper

High Speed PCB Layout: Physical Design Issues of Highspeed Interfaces

Moore’s law, applied to data rates, has pushed PCB circuits so fast that the layout becomes part of the circuit. In designs such as DDR3 and PCIe, the fastest memory and high-speed serial performance... View White Paper

Adopting the Library and Data Management Solutions of Best-in-Class Companies in the Electronics Industry

The design of electronic products is driven by continuous changes and data management challenges, which companies somehow manage. This paper emphasizes the criticality of library and data management from... View White Paper

Concurrent Engineering and its Application in Barbecues, Car Washing, and PCB Design

Why does concurrent engineering matter? All of us are looking for ways to do things faster, whether at work designing a PCB or at home with more mundane tasks such as cleaning the car or cooking a meal.... View White Paper

Automated Test Creation for Mixed Signal IP using IJTAG

The creation of test patterns for mixed signal IP has been, to a large extent, a manual effort. To improve the process used to test, access, and control embedded IP, the new IEEE P1687 standard 1 is being... View White Paper

Ready for 3D-IC

This technical presentation describes the challenges and Mentor's solutions for verifying and testing IC designs targeted for 3D packages, such as stacked die using TSVs or multi-die packages using silicon... View White Paper

Low Power Test

Today’s advanced integrated circuit (IC) designs are increasing in complexity, with their seemingly endless progression to smaller geometries, ever increasing integration between analog and digital... View White Paper

High Quality Test of ARM® Cortex™-A15 Processor Using Tessent® TestKompress®

This white paper provides a high level overview of the Mentor reference flow for ARM architecture. View White Paper

Communicate, eXecute, and Translate - Oh My! - the Power of xtUML and Virtual Platforms

This paper describes a model-driven development approach that leverages modeling efforts to validate functionality and transform high level models into forms that are useful at the next development step.... View White Paper

A Methodology to Manage Mechatronic Development in Medical Electronic Products

This paper discusses model-driven development (MDD) as the enabler of virtual system integration. MDD dramatically reduces the risks of complex mechatronic system development, increases productivity within... View White Paper

Modernizing System Development: Requirements-based, Model-driven Design, Implementation & Test

This paper explores a more modern approach to system development built on a Model Driven Development (MDD) approach. MDD directly addresses the three key challenges of systems design: 1) sequential development... View White Paper

A Requirements-Driven System Design Process (with a Preview of ARP 4754A)

This presentation, which was delivered at IESF Mil-Aero in Long beach, CA, on Sept 13, 2011, discusses the importance of a requirements-driven systems development process. It also introduces the new regulatory... View White Paper

Step by Step...Confidently: Through the AUTOSAR Round Trip

This paper demonstrates the interaction and the interoperability of architecture and model-based design environments in five steps using the examples of MATLAB, Simulink, and Embedded Coder by MathWorks,... View White Paper

Round-Trip Engineering Key to AUTOSAR-based Development

This paper discusses how round-trip engineering can be used as an iterative development process and describes interoperability between tools from Mentor and MathWorks. View White Paper

The Electrifying Side of AUTOSAR: The Case for Using the ECU Resource Template

This paper describes a meta-model that covers specific portions of software-oriented AUTOSAR development methodology using the ECU Resource Template. View White Paper

Top-down Design of Distributed Embedded Systems in Light of Timing Considerations

Proper safeguarding of safety-critical systems in an automotive environment cannot be ensured sufficiently without taking timing into consideration. The failure to observe timing constraints can lead to... View White Paper