on-demand webinar

STMicroelectronics: Low-Power Design Using High-Level Synthesis for Automotive Image Sensor

Estimated Watching Time: 27 minutes

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STMicroelectronics: Low-Power Design Using High-Level Synthesis for Automotive Image Sensor

An image signal processor (ISP) is used to post-process data coming from the pixel array, applying a wide range of algorithms to the captured picture, such as defect correction, HDR merge, and noise reduction. Area and low-power are key differentiators, and a robust design flow is needed to meet ISO 26262 requirements. In this webinar, STMicroelectronics details how C++ templates and Catapult tools are used to design the ISP building blocks, enabling maximum flexibility and significantly accelerating the development of the products. They also present the associated verification flow, based on a generic UVM environment, that takes benefit from HLS and ensures a high design quality. Finally, they show how this fast design method is compliant with the ISO 26262 automotive standard.

What You Will Learn

  • How C++ templates and Catapult tools are used to design ISP building blocks
  • Fast design method compliant with ISO 26262 automotive standard
  • Verification flow, based on a generic UVM environment

Who Should View

  • RTL Designers or Project Managers interested in moving up to HLS
  • Architects or Algorithm developers in the field of image processing and computer vision interested in rapid and accurate exploration of power/performance metrics

Meet the speaker

STMicroelectronics

Marc Schmitz

Imaging IPs Design Manager

Marc manages the digital design and verification teams in STMicroelectronics’ Imaging division, which is focused on Image Sensor and Time-Of-Light products for consumer and automotive markets. After a Dipl.-Ing.degree from Phelma School in Grenoble, Marc started in STMicro in 2004 as a verification engineer and worked on many projects such as Microcontroller or Multimedia Engine for Application Processor. His technical expertise encompasses verification and design flows including High-Level Synthesis introduced in 2007 in the design process.

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